1. Field of the Invention
The present invention relates to a method and a related apparatus for driving an LCD monitor, and more particularly, to a method and a related apparatus which can drive pixels located in a row of the LCD panel toward a target level so as to display a uniform gray level.
2. Description of the Prior Art
The advantages of the liquid crystal display (LCD) include lighter weight, less electrical consumption, and less radiation contamination. Thus, the LCD has been widely applied to several portable information products such as notebooks, and PDAs. The LCD gradually replaces the cathode ray tube (CRT) monitors of the conventional desktop computers. The incident light will produce different polarization or refraction effects when alignment of these liquid crystal molecules is different. The LCD utilizes the characteristics of the liquid crystal molecules to generate red, blue, and green lights with different intensities of gray level to produce gorgeous images.
Please refer to FIG. 1 of a schematic diagram of a conventional thin film transistor (TFT) liquid crystal display (LCD) 10. The LCD 10 comprises an LCD panel 12, a control circuit 14, a first driving circuit 16, a second driving circuit 18, a first power supply 20, and a second power supply 22. The LCD panel 12 is composed of two substrates and an LCD layer interposed between the two substrates. A plurality of data lines 24, a plurality of gate lines 26, which are perpendicular to the data lines 24, and a plurality of thin film transistors 28 are disposed on one of the two substrates. A common electrode is disposed on the other substrate for providing a constant voltage Vcom via the first power supply 20. For easier description, only one thin film transistor 28 is illustrated in FIG. 1. However, a plurality of thin film transistors 28 are respectively disposed on intersections of the data lines 24 and the gate lines 26 in fact. Thus, the thin film transistors 28 are arranged on the LCD panel 12 in a matrix format. In another words, each of the data lines 24 corresponds to one column of the TFT LCD 10, each of the gate lines 26 corresponds to one row of the TFT LCD 10, and each of the thin film transistors 28 corresponds to one pixel. In addition, the two substrates of the LCD panel 12 can be regarded as an equivalent capacitor 30 according to their electrical performance.
The driving method of the conventional TFT LCD 10 is described as follows. The control circuit 14 is used to control driving process of the TFT LCD 10. When the control circuit 14 receives horizontal synchronization 32 and vertical synchronization 34, the control circuit 14 inputs corresponding control signals to the first driving circuit 16 and the second driving circuit 18 respectively. Then, the first driving circuit 16 and the second driving circuit 18 generate input signals for each data line 24, for instance DL3, and each gate line 26, for instance GL3, according to the control signals so as to control conductance of the thin film transistors 28 and voltage differences between two ends of the equivalent capacitors 30 and to rearrange the alignment of the liquid crystal molecules and the corresponding light transmittance in advance. For example, the second driving circuit 18 inputs a pulse to the gate lines 26 so as to make the thin film transistors 28 conduct. Thus, the signals from the first driving circuit 16 to the data lines 24 can be input to the equivalent capacitors 30 via the thin film transistors 28 so as to control the gray levels of the corresponding pixels. In addition, different signals input to the data lines 24 from the first driving circuit 16 are generated based on the voltages V0˜V″m transmitted by the second power supply 22. The first driving circuit 16 has a voltage divider 17 for generating a plurality of voltages V0, . . . , Vn based on the voltages V0, . . . , V″m. For example, the second power supply 22 is capable of outputting 10 different voltages V0, . . . , V″9. Therefore, the voltage divider 17 is capable of dividing each of the 10 different voltages V0, . . . , V9 to generate 256 different voltages V0˜V255. Then, the first driving circuit 16 drives the thin film transistors 28 by selecting one adequate voltage out of the voltage V0, . . . , V255 according to the display data 36. Generally speaking, different voltages correspond to different gray levels. A display related to the display data 36 will be shown on the LCD panel 12 in the end.
Please refer to FIG. 1 and FIG. 2. FIG. 2 is a schematic diagram of the first driving circuit 16 shown in FIG. 1 . The first driving circuit 16 further comprises a voltage selection module 56 and an operational amplifier circuit 37 for driving the corresponding thin film transistors 28 respectively according to the different voltages V0 to Vn generated by the voltage divider 17. The operational amplifier circuit 37 comprises a plurality of operational amplifiers 44, 45, 46, 47, 48 and 49. Each of the operational amplifiers 44, 45, 46, 47, 48 and 49 is used to form an output buffer that has a unity gain. In addition, each operational amplifier 44, 45, 46, 47, 48, 49 in the operational amplifier circuit 37 is electrically connected to a corresponding multiplexer (MUX3 to MUX8 shown in FIG. 2) positioned within the voltage selection module 56. It is noteworthy that only six operational amplifiers and related multiplexers are shown in FIG. 2 for simplicity. According to the control signals D3 to D8 outputted from the control circuit 14, the corresponding multiplexers will select one specific voltage level from the different voltages (V0 to Vn) generated by the voltage divider 16. Each of the multiplexer (MUX3 to MUX8 for example) functions as an analog-to-digital decoder (DAC) to decode the corresponding display data 36. After decoding the display data 36, the multiplexer is capable of selecting one of the voltages V0, . . . , Vn. In other words, the first driving circuit 16 is used for selecting one of the voltages V0, . . . , Vn and outputting the selected voltage to a corresponding pixel according to the display data 36. It is noteworthy that each voltage level V0, . . . , Vn is individually transmitted via a power transmission line such as a metal wire 66 shown in FIG. 2. When the control circuit 14 receives the horizontal synchronization 32 and the vertical synchronization 34, corresponding signals are then generated and are inputted to the first driving circuit 16, and the second driving circuit 18. For example, when the second driving circuit 18 generates a pulse to make all thin film transistors located in one row conducted, that means thin film transistors 38, 39, 40, 41, 42 and 43 are conducted. The first driving circuit 16 determines that DL3, DL4, DL5, DL6, DL7, and DL8 in the data lines 24 should be driven under the voltage V1 according to the display data 36 so as to drive the thin film transistor 38, 39, 40, 41, 42 and 43 toward the target voltage V1 via the operational amplifier circuit 37. Therefore, the multiplexers MUX3, MUX4, MUX5, MUX6, MUX7, and MUX8 related to the operational amplifiers 44, 45, 46, 47, 48, and 49 are controlled to select the required voltage level such as V1. The operational amplifiers 44, 45, 46, 47, 48, and 49 take the voltage level, for instance V1, as an input voltage to drive the thin film transistor 38, 39, 40, 41, 42, and 43 later. However, the operational amplifiers 44, 45, 46, 47, 48 and 49 have different offsets affecting the actual output voltages so that the voltage differences of the capacitors 50, 51, 52, 53, 54, and 55 are different. According to the display data 36, the pixels corresponding to DL3, DL4, DL5, DL6, DL7, and DL8 in the data lines 25 should display the same gray level. However, the gray levels in the display screen are not uniform because different offsets of the output voltages are made by the operational amplifiers 44, 45, 46, 47, 48 and 49, which therefore deteriorates the display quality.